A screenless, voice-driven AI hardware device designed in collaboration with Jony Ive and OpenAI. The device runs GPT models natively for conversational AI interaction, persistent context, and AI agent capabilities. Designed to be worn or carried (pocketable form factor), it represents a new computing category distinct from smartphones—prioritizing ambient sensing and voice over traditional display-based interaction.

Feasibility at a glance
PT localization
3/10
Low
Only finishing and testing can be localised in Portugal.
Per unit
$6.5B acquisition valuation (development); unit cost TBD
at 1-unit volume
Starter batch
1units
minimum viable run
To first batch
38weeks
8 phases, design to ship
Budget
€950–1350k
all-in estimate
Bottom line
The OpenAI Screenless AI Device is a high-complexity, cutting-edge product requiring world-class industrial design, precision electronics manufacturing, and deep integration of AI inference hardware. While Portugal has some medical-device and optics firms (Philips, Siemens Healthineers), it lacks the specialized consumer-electronics ecosystem needed for custom logic boards, MEMS microphone arrays, and miniaturized wireless modules. A co-development partnership with an established EU electronics partner (Germany, Netherlands, or France) gives access to proven SMT assembly lines, acoustic tuning labs, and firmware engineering while keeping production, IP, and quality within the EU regulatory perimeter. This approach balances time-to-market, technical risk, and compliance with the premium brand positioning Jony Ive's design demands.
3 capabilities
Allows you to talk to OpenAI's GPT models anytime, anywhere, without pulling out your phone or opening an app.
Acts as an AI agent that remembers past conversations and can take actions on your behalf, like setting reminders or answering complex questions.
Provides a hands-free, eyes-free way to interact with AI through voice, so you can stay focused on the world around you.
5 stations · build route
Custom PCB fabrication and SMT assembly
Design and populate the main logic board with processors, memory, AI inference chips, and wireless radios using automated pick-and-place machines.
Precision CNC machining and anodizing of aluminum enclosure
Mill the device body from billet aluminum to tight tolerances, then anodize for a durable, premium finish with exact color matching.
Integration of microphone array, speaker, and sensors
Mount the MEMS microphones, speaker driver, and ambient sensors into the enclosure with acoustic tuning and calibration.
Battery pack assembly and installation
Assemble lithium polymer cells with protection circuits and integrate into the device chassis with thermal management.
Final assembly, firmware flashing, and multi-stage testing
Combine all subassemblies, load the AI firmware, and run voice recognition, wireless, and battery tests before packaging.
Custom PCB fabrication and SMT assembly
Design and populate the main logic board with processors, memory, AI inference chips, and wireless radios using automated pick-and-place machines.
Precision CNC machining and anodizing of aluminum enclosure
Mill the device body from billet aluminum to tight tolerances, then anodize for a durable, premium finish with exact color matching.
Integration of microphone array, speaker, and sensors
Mount the MEMS microphones, speaker driver, and ambient sensors into the enclosure with acoustic tuning and calibration.
Battery pack assembly and installation
Assemble lithium polymer cells with protection circuits and integrate into the device chassis with thermal management.
5 identified · 4 blocking
Critical
AI Inference Chip Supply Constraint
The device requires a custom or semi-custom AI inference accelerator (e.g., Google Edge TPU, Hailo-8, or Qualcomm Cloud AI 100 Edge) to run GPT models on-device with acceptable latency and power. These chips are subject to multi-quarter lead times, allocation constraints, and export controls under US EAR and EU dual-use regulations. A shortage or geopolitical restriction (e.g., China tensions, ITAR-like AI controls) could delay production by 6–12 months or force a costly architecture pivot to less-efficient general-purpose SoCs.
Mitigation — Secure long-term supply agreements (LSAs) with at least two inference-chip vendors (primary: Hailo or Qualcomm; secondary: NXP i.MX with NPU or MediaTek Genio). Pre-purchase 6 months of buffer inventory once design is frozen. Architect firmware to gracefully degrade to cloud inference if edge compute is unavailable, and lobby EU trade officials to exempt low-power AI accelerators from dual-use export restrictions.
High
Firmware and Voice-Data IP Leakage
The device's core value lies in OpenAI's GPT inference stack, voice-processing algorithms, and user-context memory. If a contract manufacturer (especially outside the EU) reverse-engineers the firmware, extracts model weights, or copies the acoustic tuning profiles, competitors (Amazon, Google, Xiaomi) could replicate the user experience within months. Additionally, voice recordings and user telemetry stored or transmitted during manufacturing QA could violate GDPR and erode user trust in OpenAI's privacy promises.
Mitigation — Implement secure boot with hardware root-of-trust (ARM TrustZone or RISC-V PMP) and encrypt firmware binaries with per-device keys. Use code obfuscation and remote attestation to prevent dumping. Contractually require EU-based manufacturing partners to sign strict NDAs with liquidated damages >€5M and conduct quarterly IP audits. Store voice data only in encrypted, ephemeral buffers during test; never log to manufacturer servers. Require ISO 27001 certification and GDPR data-processing agreements (DPAs) from all partners.
High
EU Radio Equipment Directive (RED) and Cybersecurity Act Compliance
The device must comply with EU Radio Equipment Directive (2014/53/EU) for wireless transmission (Wi-Fi, Bluetooth, cellular) and the new EU Cybersecurity Act / Radio Equipment Directive amendments requiring security-by-design, software updates, and data protection. Non-compliance blocks CE marking and market access across all 27 EU member states. The always-listening microphone and cloud connectivity trigger additional scrutiny under GDPR Article 25 (data protection by design) and ePrivacy Directive. Certification testing (EMC, SAR, RED) takes 12–16 weeks and must be repeated for any hardware or antenna changes.
Mitigation — Engage a notified body (e.g., TÜV Rheinland, Intertek) in parallel with EVT (Engineering Verification Testing) to front-load RED compliance—conduct pre-compliance EMC and RF testing at week 18. Design antenna and RF frontend with 3–5 dB margin to pass radiated emissions and immunity tests on first attempt. Implement secure boot, mandatory firmware signing, and automatic security updates per RED Article 3(3). Publish a GDPR-compliant privacy policy and conduct a Data Protection Impact Assessment (DPIA) before pilot production. Budget €150k–250k for full RED + GDPR certification.
High
Battery Safety and Thermal Management in Compact Form Factor
Lithium polymer batteries in a pocketable, wearable device pose fire and thermal-runaway risks if the AI inference chip, wireless radios, and charging circuit generate localized hotspots. EU Battery Directive (2006/66/EC, updated 2023) and IEC 62133 require rigorous safety testing (overcharge, short-circuit, crush, thermal shock). A battery incident post-launch (e.g., Samsung Note 7) would be catastrophic for OpenAI's consumer brand. The small form factor limits heat-spreading area and airflow, increasing risk.
Mitigation — Design with 20% thermal margin: use a multi-layer graphite heat spreader and thermally couple the AI chip to the aluminum enclosure (acts as passive heatsink). Implement multi-stage battery protection: hardware over-current/over-voltage IC (e.g., TI BQ25703A) plus firmware-enforced charge curves and temperature monitoring (NTC thermistors at 3+ points). Qualify batteries to IEC 62133-2 and UN 38.3 (transport) with a tier-one EU cell supplier (e.g., Varta, Saft). Conduct 100-unit ESS (Environmental Stress Screening) during pilot run: thermal cycling -20°C to +60°C, drop tests, and 500-cycle charge/discharge validation. Purchase product-liability insurance with €10M per-incident coverage.
Medium
Acoustic Tuning and Microphone Array Iteration Risk
Far-field voice capture in noisy environments (cafes, streets, cars) requires precise MEMS microphone array geometry, acoustic isolation, and DSP beamforming. Achieving best-in-class wake-word detection and speech recognition often takes 3–5 hardware iterations (EVT, DVT, PVT) as engineers tune microphone placement, port sizing, and enclosure resonances. Each iteration adds 6–8 weeks if CNC tooling must be revised. Underestimating this risk leads to launched products with poor voice UX (see: early Amazon Echo reviews).
Mitigation — Allocate 10 weeks explicitly for acoustic DVT and partner with a manufacturer that has an anechoic chamber and multi-axis robotic voice-stimulus rig (e.g., Neways, Innotech). Simulate microphone array performance in COMSOL or Ansys HFSS before cutting metal to reduce physical iterations. Run A/B listening tests with 50+ users in real-world environments (cafés, gyms, cars) during DVT. Build 5–10 'mule' prototypes with adjustable microphone mounts to explore the design space faster. Keep DVT and PVT enclosure tooling soft (3D-printed SLS or CNC from plastic) until acoustic performance is validated.
38 weeks to first batch
Industrial Design Freeze and CAD Handoff
wk 1–4PCB Schematic and Layout Design
wk 5–10PCB Fabrication and SMT Assembly (EVT)
wk 11–15Enclosure Tooling and First Article CNC
wk 16–21Acoustic DVT: Microphone Array and Speaker Tuning
wk 22–31Battery Pack Assembly and Thermal Validation
wk 32–35Firmware Integration and System Testing (PVT)
wk 36–40Pilot Production and Final Certification
wk 41–46Industrial Design Freeze and CAD Handoff
PCB Schematic and Layout Design
wk 22–31 is the longest stretch — Acoustic DVT: Microphone Array and Speaker Tuning takes 10 weeks of the 46 weeks on this build.
7 materials · 8 processes
Materials
Processes
681 Portuguese manufacturers matched
None cover the whole build — it splits across steps.
13 tasks · 12 weeks to first batch
Week 1
2 tasks
Select and contract EU co-development partner
waits on Partner capacity for Q1/Q2 slot, NRE payment terms and escrow
Evaluate and sign LOI/MSA with a tier-one EU electronics manufacturer (Neways NL, Innotech DE, Cicor CH/DE, or Groupe SERMA FR). Negotiate NRE cost (€800k–1.5M), IP ownership (joint for hardware, OpenAI-exclusive for firmware), lead time (38 weeks to pilot), and quality commitments (>95% yield). Confirm partner has anechoic chamber, SMT lines, and RED certification experience.
Freeze industrial design and release CAD to engineering
waits on Design iteration with acoustic team on port sizing, Material lead time for aluminum billet
Jony Ive's team finalizes enclosure form factor, aluminum alloy spec (6061-T6 or 7075), anodize finish (color, texture), and microphone/speaker port geometry. Export STEP/IGES files with tolerances (±0.1mm for critical fits) and BOM. Trigger CNC tooling design and injection-mold quotes for internal brackets.
Weeks 2–3
2 tasks
Complete PCB schematic and select AI inference chip
waits on AI chip lead time and allocation, Export control / ITAR clearance for AI accelerator
Electrical engineering (founder + partner) designs main logic board: finalize AI accelerator (Hailo-8, Qualcomm Cloud AI 100 Edge, or NXP i.MX with NPU), LPDDR4, eMMC, Wi-Fi 6E/BT 5.3 module, PMIC, USB-C PD, I/O for 3× MEMS mics and speaker. Secure long-term supply agreement (LSA) or buffer inventory (6 months) for AI chip. Release schematic for layout.
Source MEMS microphone array and speaker module
waits on MEMS mic allocation if consumer demand spikes, Acoustic performance data from suppliers
Identify and qualify suppliers for 3× MEMS microphones (Knowles, Infineon, STMicroelectronics) with low self-noise (<25 dBA SPL) and high SNR (>64 dB). Select speaker module (6–8mm dynamic driver or balanced armature) optimized for voice band (300–3400 Hz). Order EVT samples and confirm lead times (8–12 weeks for production volumes).
Weeks 4–7
3 tasks
Fabricate and populate EVT PCBs (20–30 boards)
waits on Component availability (long-lead ICs), PCB fab slot at partner
PCB fab (8–10 layer, ENIG finish, controlled impedance) and SMT assembly at partner facility. Validate electrical functionality, power tree, I/O interfaces, and thermal performance under load. Conduct ICT (in-circuit test) and functional test. Identify any design errors (wrong footprint, signal integrity issues) and trigger rev B if needed (adds 3 weeks).
Machine first-article enclosures and anodize samples
waits on CNC tooling lead time (4–6 weeks), Anodize color matching and surface finish QC
CNC mill 5–10 aluminum enclosures from billet (6061 or 7075) per industrial design CAD. Verify dimensional accuracy (CMM inspection), port alignment for microphones/speaker/USB-C, and internal battery cavity fit. Anodize samples (Type II or III) and color-match to Jony Ive spec. Iterate CAM programs if fit issues arise.
Draft GDPR Data Protection Impact Assessment (DPIA)
waits on Firmware architecture decisions on local vs cloud processing, DPA template from manufacturing partner
Weeks 8–16
6 tasks
Integrate EVT units and begin acoustic DVT
waits on Access to partner's anechoic chamber and robotic test rig, Firmware DSP stack readiness
Assemble 10–15 EVT units: PCB + MEMS mics + speaker + enclosure + battery mockup. Conduct initial acoustic measurements in anechoic chamber: frequency response, directivity, THD, far-field intelligibility (1m, 3m). Tune beamforming DSP coefficients for wake-word and ASR. Iterate enclosure port geometry (size, shape, mesh) and microphone placement over 3–5 cycles to hit SNR and wake-word accuracy targets.
Assemble and test battery packs with thermal validation
waits on Custom battery cell lead time (8–10 weeks), Thermal chamber access for validation
Integrate lithium polymer cells (custom 1200mAh pouch) with protection PCB (over-current, over-voltage, NTC). Install in enclosure and run thermal stress tests under peak load (AI inference + Wi-Fi TX + max speaker volume). Measure surface temperature (target <45°C) and validate 100-cycle charge/discharge per IEC 62133. Add graphite heat spreader or firmware throttling if hotspots detected.
Build firmware alpha: GPT inference and voice pipeline
waits on AI model quantization and optimization for edge inference, Wireless module driver stability
6 roles to fill before month one
Co-development technical lead
Senior Embedded Systems Architect at EU partner (Neways, Innotech, Cicor)
Owns PCB schematic, layout, component selection, and SMT bring-up. Critical for integrating AI inference chip, power optimization, and firmware/hardware co-design. Must have experience with low-power SoCs and wireless modules.
Microphone array and speaker tuning specialist
Acoustic Engineering Lead with MEMS and far-field voice experience
Leads DVT acoustic testing in anechoic chamber, tunes beamforming DSP, and iterates enclosure port geometry to achieve best-in-class wake-word and ASR performance. Make-or-break for voice UX quality.
RED and safety compliance advisor
Notified Body Certification Manager (TÜV Rheinland, Intertek, SGS)
Guides pre-compliance testing (EMC, RF, SAR), interprets RED 2014/53/EU and Cybersecurity Act requirements, and issues EC Type-Examination Certificate for CE marking. Early engagement prevents costly re-spins.
Long-lead component supply and technical support
AI Chip Vendor Account Manager (Hailo, Qualcomm, NXP)
Secures allocation and LSA for AI inference accelerator (12–16 week lead time), provides reference designs and SDK, and troubleshoots inference performance and power issues. Critical path for on-device GPT execution.
5 things to avoid in this plan
lead time
Lock in AI inference chip supply NOW—Hailo, Qualcomm, and NXP all have 12–16 week lead times and are subject to allocation constraints and export controls. A delay here pushes the entire timeline by 6+ months. Secure LSA or buffer inventory (6 months) in week 2.
quality
Acoustic DVT is the critical path and highest iteration risk. Allocate 10 full weeks and partner with a manufacturer that has an anechoic chamber, robotic voice-test rig, and experienced DSP team. Underestimating this kills voice UX and market differentiation.
certification
RED certification (EMC, RF, cybersecurity) takes 12–16 weeks and must pass on first or second attempt. Engage notified body during EVT (week 4) for pre-compliance testing. Design antenna and RF frontend with 3–5 dB margin to avoid late re-spins that delay pilot by 8+ weeks.
quality
2 tasks in week 1
Select and contract EU co-development partner
Final assembly, firmware flashing, and multi-stage testing
Combine all subassemblies, load the AI firmware, and run voice recognition, wireless, and battery tests before packaging.
PCB Fabrication and SMT Assembly (EVT)
Enclosure Tooling and First Article CNC
Acoustic DVT: Microphone Array and Speaker Tuning
Battery Pack Assembly and Thermal Validation
Firmware Integration and System Testing (PVT)
Pilot Production and Final Certification
Legal and product teams document data flows for voice capture, cloud inference, user-context memory, and telemetry. Identify GDPR Article 6 legal basis (consent, legitimate interest), data minimization measures (ephemeral buffers, local processing), and user rights (access, erasure). Consult with EU data protection authority if high-risk processing (always-on microphone) is identified.
Develop firmware stack on RTOS (FreeRTOS, Zephyr): integrate GPT inference runtime (quantized model, KV cache), voice DSP (beamforming, AEC, NR), wireless drivers (Wi-Fi, BT), and power management. Implement secure boot with hardware root-of-trust (ARM TrustZone) and per-device encryption keys. Flash onto EVT boards and validate end-to-end latency (<500ms wake-to-response).
Conduct RED pre-compliance testing (EMC, RF)
waits on Lab availability (book 6–8 weeks in advance), Antenna and RF frontend design margin
Send 3–5 EVT units to notified body (TÜV Rheinland, Intertek) or accredited lab for pre-compliance EMC (conducted/radiated emissions and immunity per EN 301 489, EN 55032) and RF testing (EN 300 328 for Wi-Fi/BT, EN 301 511 if cellular). Identify any failures (e.g., emissions spikes, antenna efficiency) and iterate PCB layout, shielding, or antenna tuning. Budget 3–4 weeks per iteration.
Finalize supply agreements for long-lead components
waits on Supplier credit terms and MOQs, Export control clearance for AI chips
Negotiate and sign purchase orders or LSAs for AI inference chip (6-month buffer), MEMS microphones, wireless modules, and lithium polymer cells. Lock in lead times (12–16 weeks for pilot, 8–10 weeks for production) and pricing for first 10k units. Identify secondary sources for critical components (AI chip, MEMS mics) to mitigate allocation risk.
Plan pilot production and QC procedures
waits on Pilot slot in partner's production schedule, Test fixture and calibration jig design
Define pilot run scope (500–1,000 units), build sequence (PCB assembly → enclosure → integration → firmware flash → calibration → functional test → packaging), and quality gates (AOI, ICT, acoustic calibration, wireless range test, drop test per IEC 60068). Write test procedures and train partner's QC team. Order packaging materials (boxes, inserts, regulatory inserts) and labels (CE mark, recycling symbols, serial numbers).
GDPR and ePrivacy compliance advisor
EU Data Protection and Privacy Counsel
Authors DPIA, negotiates data-processing agreements (DPAs) with manufacturing partners, and ensures voice data handling meets GDPR Article 25 (data protection by design) and ePrivacy Directive consent requirements. Protects OpenAI's privacy-first brand positioning.
Lithium polymer integration and IEC 62133 validation
Battery Safety and Thermal Engineer (tier-one cell supplier: Varta, Saft, LG)
Designs custom battery pack with protection circuits, conducts thermal validation and abuse testing (overcharge, short-circuit, crush), and certifies to IEC 62133-2 and UN 38.3. Mitigates catastrophic fire/thermal-runaway risk in compact form factor.
Firmware IP and voice data must stay in EU jurisdiction. Require ISO 27001, GDPR DPAs, and liquidated-damage NDAs (>€5M) from manufacturing partner. Implement secure boot, per-device encryption, and remote attestation. A data breach or IP leak would be catastrophic for OpenAI's brand.
quality
Battery thermal management in a compact, wearable form factor is high-risk. Design with 20% thermal margin, use graphite heat spreader, couple AI chip to aluminum enclosure as heatsink, and conduct 100-cycle validation per IEC 62133. Budget €80k+ for thermal testing and purchase €10M product-liability insurance.
681 matched · 8 shown, ranked by coverage
Covers, left to right: SMT Assembly · PCB Fabrication · Injection Molding · CNC Machining · Anodizing · Final Assembly · Testing & Inspection · Packaging
Manufacturer
Location
Covers
Certifications
People
Portuguese producers per required step
Final Assembly
369
CNC Machining
212
Testing & Inspection
178
Injection Molding
174
SMT Assembly
36
PCB Fabrication
6
Anodizing
3
How many cover more than one step
The gap
The OpenAI Screenless AI Device is a high-complexity, cutting-edge product requiring world-class industrial design, precision electronics manufacturing, and deep integration of AI inference hardware. While Portugal has some medical-device and optics firms (Philips, Siemens Healthineers), it lacks the specialized consumer-electronics ecosystem needed for custom logic boards, MEMS microphone arrays, and miniaturized wireless modules. A co-development partnership with an established EU electronics partner (Germany, Netherlands, or France) gives access to proven SMT assembly lines, acoustic tuning labs, and firmware engineering while keeping production, IP, and quality within the EU regulatory perimeter. This approach balances time-to-market, technical risk, and compliance with the premium brand positioning Jony Ive's design demands.
Send one RFQ to the top 4
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Packaging
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